DFT Engineer Intern - AI/CPU Silicon Design
Tenstorrent
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Santa Clara, CA, USA
Posted on Tuesday, January 31, 2023
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.
As an intern on the Design for Test (DFT) team, you will work on high-performance designs going into industry leading AI/ML architectures. The student coming into this role will be involved in all implementation aspects from RTL to tapeout for various IPs on the chip. The work is done collaboratively with a group of highly experienced engineers across various domains of the ASIC.
Responsibilities
- Work closely with other DFT engineers and the front end team to understand the chip architecture and Back end (PD) team to understand the PD flows and how DFT fits into their flow and methodology.
- DFT tasks such as DFT Architecture, DFT IP design, DFT implementation, DFT and design rules, verification of DFT features, Scan and and test pattern generation
- Learn and implement DFT Features from RTL to pattern generation to Tape out
- Deploy innovative techniques for DFT implementation, pattern generation, verification to improve Test Coverage
Experience & Qualifications
- Currently pursuing a BS/MS/PhD in EE/ECE/CE/CS
- Basic knowledge of scan design, built-in-self-test and ATPG
- Familiarity with logic simulation, verification and debug
- Experience with gate-level simulation with SDF is a plus
- Verilog and RTL knowledge
- Strong programming skills in Tcl/Perl/Shell/Python
- Good understanding of logic design fundamentals and gate/transistor level implementation
- Strong problem solving skills
Locations:
Austin, TX | Santa Clara, CA
Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.
This job is no longer accepting applications
See open jobs at Tenstorrent.See open jobs similar to "DFT Engineer Intern - AI/CPU Silicon Design" Work In Tech.